GAL16V8D-10LJ High Performance E2CMOS PLD Generic Array Logic™ IC

GAL16V8D-10LJ High Performance E2CMOS PLD Generic Array Logic™ IC

The GAL16V8, at 3.5 ns maximum propagation delay time, com-bines a high performance CMOS process with Electrically Eras-able (E2) floating gate technology to provide the highest speed performance available in the PLD market.  High speed erase times(<100ms) allow the devices to be reprogrammed quickly and efficiently. The generic architecture provides maximum design flexibility by allowing the Output Logic Macro cell (OLMC) to be configured by the user.  An important subset of the many architecture configurations possible with the GAL16V8  are the PAL architectures listed in the table of the macro cell description section.  GAL16V8  devices are capable of emulating any of these PAL  architectures with full function/fuse map/parametric compatibility.

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• HIGH PERFORMANCE E2CMOS® TECHNOLOGY—3.5 ns Maximum Propagation Delay
  

• 50% to 75% REDUCTION IN POWER FROM BIPOLAR—75mA TYP ICC on Low Power Device
  

• ACTIVE PULL-UPS ON ALL PINS
  

• EIGHT OUTPUT LOGIC MACROCELLS—Maximum Flexibility for Complex Logic Designs
  

• PRELOAD AND POWER-ON RESET OF ALL REGISTERS—100% Functional Testability
  

Specifications of GAL16V8D-10LJ High Performance E2CMOS PLD Generic Array Logic™ IC

• Technology: Electrically Erasable CMOS (E2CMOS).

• Number of Macro cells: 8 programmable macro cells.

• Propagation Delay: 10 ns (GAL16V8D-10LJ version), providing high-speed performance.

• Programmability: Electrically erasable and programmable with up to 1000 erase/write cycles.

• Operating Voltage: 5V ±10%.

• Input Threshold Levels: TTL compatible inputs, making it easy to interface with TTL logic families.

Package Includes

• 1 x GAL16V8D-10LJ   IC